Substrates for electronic circuitry are one of the most important applications for high performance ceramics in the microelectronics industry. The circuits are applied using thick film and thin film techniques. In the case of single layer substrates, conductors and other components (resistors, capacitors, etc.,) are applied to the top and bottom of such substrates, with conductive vias through the substrate connecting the top and bottom circuitry. The property requirements for vias in thick film hybrid circuits are generally not difficult to meet; however, because of the high performance and high costs associated with thin film hybrids, the circuitry, including the vias, have stringent property requirements and must be fabricated with precision. The art in circuit fabrication using thin film technology is well established, yet important problems have persisted in the fabrication of vias.
Vias are formed in thin film substrates, which are typically greater than 99.5% alumina, by "drilling" a hole in the substrate, coating the inside of the hole with a thin layer of metal using lithography, vapor deposition methods, and plating processes. Because of the small tolerances (typically less than or equal to 2.0 mil/inch) in the hole position required for thin film processing, laser drilling of the via holes is commonly practiced. Although precise hole position is possible with laser systems, many problems are associated with this method. First, slag and other defects, such as microcracks, are often generated on the substrate around the via holes; these defects can degrade the adhesion and quality of the subsequently applied thin film metallurgy. Second, reproducible, high quality metallization of laser drilled holes is difficult to achieve. Thus, the distribution of resistance values may be unacceptably broad, thereby resulting in low process yields. Third, residual stresses around via holes generally remain in the substrate through subsequent processing. These stresses can be sufficiently large to cause fracture of the substrate during subsequent assembly operations, particularly during soldering. If this occurs in the final assembly steps of an electronic subsystem, the yield losses can be very costly. Although the stresses may be reduced by heat treating laser drilled substrates prior to metallizing, the product quality is still suboptimal.
Lower cost, and potentially higher yield methods have been investigated in recent years. One example is the fabrication of prepunched thin film substrates. Thin film substrates are generally fabricated using a doctor blade process to form green ceramic tape comprising a binder and ceramic powders. This flexible tape is cut into sheets and fired to obtain a dense ceramic substrate. Prepunched substrates are formed by punching holes into the green sheets prior to firing using hard tooling or a numerically controlled punch press.
Extreme care is required during tape processing to minimize the introduction of surface defects on the final substrate. The manufacturing of defect-free, smooth substrates suitable for thin film applications is a difficult task, and becomes even more difficult when via holes are punched into the green tape. Yet, the quality of such holes is sufficient to allow significant cost reduction and yield improvements in subsequent metallizing. However, the application of the prepunched via method is limited by the poor accuracy in the position of via holes in fired substrates. The current art in tape technology generally provides position tolerances in the range of plus-or-minus 0.3 to 1.0% (3-10 mil/inch) because of the variabilities in shrinkage during the firing of such tape.
Accordingly, there is a need for methods of producing high quality thin film substrates having metallized vias, in which the vias have lower resistance and a more uniform distribution of resistivities. The methods should allow higher yields and lower fabrication costs and should also leave minimal residual stress in the substrates. There is also a need for substrates having dense vias which provide for higher thermal conductance than currently produced substrates. Hermeticity of the vias is desired for certain applications; this is not possible using current art in thin film techniques to metallize vias. Finally, it would be desirable to develop methods which would also be applicable to thick film substrates.
One proposed approach has been the co-firing of conductor-filled vias with the green ceramic tape. Via holes are punched in the tape and filled with thick film conductor ink using screen printing, followed by cofiring at high temperatures (1500.degree.-1650.degree. C.) in a reducing atmosphere. This method is possible for thick film substrates, generally fabricated from 90-96% Al.sub.2 O.sub.3 substrates; however, current art metallurgy limits electrical and thermal conductance. Furthermore, little success has been demonstrated with cofired vias in substrates comprising greater than 99.0% alumina. The primary reason for failure, or at best very limited success, has been the inadequacy of the applied metallization technology. High resistivities (greater than about 6.7.times.10.sup.-3 ohm-centimeter) and low thermal conductivities are generally observed because of the high level of porosity (about 20 to 40%) in the metal or other nonmetallic phase (such as glass). As a result, hermeticity of vias has also not been possible. In addition, the technology for shrinkage tolerances required during cofiring to allow high yields of substrates having precisely positioned vias (tolerance less than plus-or-minus 0.2% required) is not widely available.